The present invention relates to controlling inrush current in a power supply, and more particularly, to circuitry for controlling inrush current efficiently during cold startup, warm startup and power line disturbance conditions.
The control of inrush current is especially important in N+1 redundant power systems. If excessive inrush current blows a fuse or trips the main circuit breaker on an AC distribution board, then the redundancy of the entire system is lost, even if the power supply is still functioning properly. The inrush current requirements of modem power supplies are very stringent, demanding efficient control of inrush current even during abnormal power line disturbances and for high current applications.
To control inrush current, conventional methods may employ a relay, a negative temperature coefficient (NTC) thermistor, thyristor or similar switch, often in combination with a resistor or thermistor, in an attempt to limit inrush current in an AC-DC power supply. As is known in the art, an NTC thermistor is a component with a resistance that decreases as its temperature increases. During power supply startup, the temperature of the thermistor is cold and its resistance high, a characteristic that can be used to limit inrush current. As the power supply continues to operate, the temperature increases and the resistance of the thermistor decreases, thereby allowing more current during normal operation.
FIG. 1A illustrates a prior art method and circuit disclosed in U.S. Pat. No. 5,202,819 to Min that includes a thermistor for controlling inrush current. Although the disclosed method provides inrush current control, it has major drawbacks. One drawback is that a Thermistor 6 in smoothing circuit 3 is always present as a series element, resulting in power dissipation proportional to the input current. This method is therefore inefficient especially for high current applications. In addition, if a power line disturbance (PLD) occurs during operation, the hot thermistor will be functioning at low resistance and so will not limit inrush current effectively. Thus, to prevent inrush current caused by the PLD, some delay must be built in to first allow the thermistor to cool or a circuit provided that bypasses the thermistor, in order to control inrush current.
Another drawback of the prior art circuit shown in FIG. 1A is that it uses a xe2x80x9cNear Zero Crossingxe2x80x9d detection for triggering two silicon controlled rectifiers (SCRs) 7,8 in the phase control rectifying circuit 5. An SCR is a device which is normally non-conducting, with conduction initiated by application of a gate current. The SCR will remain ON (i.e., conducting) until current flowing in the SCR is reduced to some minimum level. If AC power fails at a non zero phase angle, slightly higher than sensed for xe2x80x9cNear Zero Crossingxe2x80x9d, and recovers at the same angle after a period of one cycle, the control circuit 4 in FIG. 1A will wait for the next near zero crossing, after nearly another half AC cycle, before triggering the SCRs 7,8. A larger bulk capacitor 9 will be required to provide energy during such a power line disturbance, even when AC is restored. The result is a circuit that costs more and that has increased space requirements.
FIG. 1B shows a timing diagram that illustrates this drawback of the prior art circuit of FIG. 1A. The SCR gate drive signal waveform 12 shows the SCR gate drive pulses that occur at near zero phase angle. When AC fails at a non-zero phase angle, as shown in the Rectified Pulses waveform 14 at point A, the SCR gate drive signal 2 will stay ON as long as energy is available on capacitor 9. If capacitor 9 has too much energy, however, there is a possibility that, due to circuit delays, the SCRs 7,8 will trigger when AC restores at point B. This would result in heavy inrush current. If the charge on capacitor 9 decays, then the SCR""s gate drive signal 2 is unavailable at point B for nearly one half cycle, upon restoration of AC power, until another zero crossing occurs at point C. As mentioned above, this problem forces use of a bigger bulk capacitor to maintain charge during the hold up period.
Another prior art method of inrush current control is disclosed in U.S. Pat. No. 5,715,154 to Rault, and shown in FIG. 2. This method has a drawback of including an extra series switch, Thyristor, 22. This extra switch will dissipate additional power; the dissipation being proportional to the input current. Thus, this method has the drawback of being very inefficient, especially for higher power applications, resulting in higher cost and the need for space-consuming heat sinking due to the increased dissipation.
FIG. 3 illustrates another conventional circuit for inrush current control. The circuit of FIG. 3 provides some inrush current control but has the drawback of not providing control during power line disturbance conditions. Modern power supply applications demand controlled inrush current even during power line disturbances that result in lost AC power. At power start up, both SCR 32 and SCR 34 in the bridge rectifier 36 shown in FIG. 3 are in the OFF state due to a lack of gate drive voltage. The initial inrush current flows through elements diode 37, diode 38, resistor 39, and diode 35 into a bulk capacitor 33 at the output of the circuit. The amount of inrush current can be kept below a desired value by choosing an appropriate value for limiting resistor 39. In operation, the Power Factor Control (PFC) boost regulator 27 starts operating by drawing power through diode 37, diode 38, and resistor 39. Bias voltage is induced in the secondary winding on the boost choke 28 due to the switching action of the boost switch 49. This induced bias voltage drives the SCRs 32,34 At that point, all power is delivered through the diode-SCR bridge.
Although the circuit of FIG. 3 can control inrush current satisfactorily for hot or cold start up conditions, the circuit has the drawback of not providing the inrush current control demanded by present generation power supplies when power line disturbances occur. Assuming an operating condition when a DCxe2x80x94DC converter (not shown) coupled to the output is already active and drawing power from the PFC boost regulator 27 at a low line voltage, e.g., 90V AC. If a power line disturbance occurs causing a missing AC cycle, bulk capacitor 33 at the output can continue to deliver power to the DCxe2x80x94DC converter during this xe2x80x9chold upxe2x80x9d period. If capacitor 26 is small and cannot hold sufficient charge for driving the SCRs 32,34 during this hold up period, and if AC is restored in a time interval slightly less than the hold up time; then PFC boost regulator 27 will start switching immediately through diode 37, diode 38, and resistor 39 with most of the voltage dropped in resistor 39. This will require a longer time to generate the required gate drive for the SCRs 32,34, which results in depletion of the charge on capacitor 33. Alternatively, if capacitor 26 is made sufficiently large, the depletion problem can be solved, as the SCRs 32,34 will remain ON and can then support the required power levels of the DCxe2x80x94DC converter. The circuit of FIG. 3 does, however, have the drawback of not controlling inrush current at high line voltage during a power line disturbance condition. If an AC cycle is missed in a high line voltage condition, capacitor 33 will deliver the hold up power and the voltage across it will drop accordingly. In this case, the SCRs 32,34 are kept ON due to the charge available on capacitor 26. Under this condition, restoration of AC at the 90 degree phase angle and peak of 264V AC results in an undesirably large inrush current. Thus, under power line disturbance conditions, the conventional method and circuit in FIG. 3 does not control inrush current satisfactorily.
FIG. 4 illustrates another known power supply circuit 80 for inrush current control. When AC voltage is applied at the input of the power supply shown in FIG. 4, initial inrush current passes through the series resistor 39 and the bulk capacitor 33 at the output of circuit 80 is charged. After capacitor 33 is charged, resistor 39 is shunted by a switch 41 to control inrush current in this AC-DC power supply. Switch 41 shown in FIG. 4 is typically a relay or thyristor or other suitable electromechanical or semiconductor device switch. Although the circuit 80 of FIG. 4 can control inrush current satisfactorily for cold start up conditions, the circuit 80 has the drawback of not providing the inrush current control demanded by current generation power supplies when power line disturbances occur. A logic control circuit could be added to circuit 80 in an attempt to provide such inrush control. The circuit 80 of FIG. 4, however, has another drawback. If an electromechanical relay is used for switch 41, although it results in a power loss which is small, its response time would be undesirably slow. This slow response time of switch 41 would result in a circuit 80 that may not provide the inrush current control demanded by present generation power supplies during operating conditions. If a thyristor or other semiconductor switch is used for switch 41, it would have the opposite problem. The resultant power dissipation would be unacceptably high since switch 41 conducts the entire input current due to its location in the circuit 80 of FIG. 4.
FIG. 5A depicts another known power supply circuit 90 for inrush current control. The circuit 90 senses the inrush current through the voltage drop across the PFC Boost converter current sense resistor 95. At initial power on, the entire controlled inrush current will pass through the diodes 37, 38, 42 and 43 of bridge rectifier 94, inductor 52, diode 48, a bulk capacitor 33 and inrush limit resistor 92. Alternatively, a bypass diode (not shown) is connected across the series combination of inductor 52 and diode 48 to avoid saturation of inductor 52. Soon after initial power on, an internal auxiliary converter (not shown) starts up and generates the bias voltage Vcc for the control circuit 96 of FIG. 5A. Comparator 91 enables a shunt switch 93 to turn ON only when the current in resistor 95 is below a certain predetermined value. The shunt switch 93 can be an IGBT (Insulated Gate Bipolar Transistor) or other suitable transistor. Whenever AC cycles are missed in operating conditions due to power line disturbances, control circuit 96 causes switch 93 to turn off. The bulk capacitor 33 will continue to discharge to hold up the bulk output voltage being fed to the DCxe2x80x94DC converter (not shown) during this hold up period. Upon restoration of AC, a high inrush current can flow if the peak of the AC voltage is greater than the bulk voltage at that point. When this inrush current flows and exceeds the limit set in the logic circuit, switch 93 turns off very quickly and the series resistor 92 limits the inrush current.
Circuit 90 has major drawbacks, however, during certain operating conditions. For example, one such operating condition would be where there are missing AC cycles and the AC voltage recovers at a 90 degree phase angle near its peak. FIG. 5B is a timing diagram illustrating the timing for the circuit of FIG. 5A for this operating condition. For FIG. 5B, Trace A represents the rectified AC pulses; Trace B is the input current; Trace C is the bulk output voltage; Trace D is the xe2x80x9cPFC Drivexe2x80x9d signal; and Trace E is the gate drive signal for IGBT switch 93. In operation, the bulk output voltage for circuit 90 would be already at a much lower level than that of the peak AC voltage. The internal auxiliary voltage Vcc would still be available and be regulated. As a result, the PFC Drive circuit for circuit 90 is ready to switch power switch 98 at any time whenever the AC voltage is restored. Where AC restores at the condition described above, a high inrush current passes through the bulk capacitor 33 and, at the same time, the PFC Drive signal switches power switch 98 and the inductor 52 stores energy.
At this stage, the control circuit 96 of FIG. 5A senses a high input current through resistor 95 and turns off switch 93. In FIG. 5B, Trace B shows the input current reaching the inrush limit and Trace E shows switch 93 being turned off after sensing the high inrush current. In the meantime, switch 98 has already started switching and energy is stored in inductor 52. During the off period of switch 98, inductor 52 had been discharging into the load and at the same time charging the bulk capacitor 33. This current which had been charging the bulk capacitor 33 now suddenly sees a higher impedance when switch 93 turns off due to inrush resistor 92. Since the inductor 52 is in continuous mode during this time, it will try to pump constant current even through this higher resistance provided by inrush resistor 92. As a result, a voltage equal to the current multiplied by the resistance of resistor 92, is superimposed on the bulk capacitor 33 as a surge or xe2x80x9cbumpxe2x80x9d (seen on Trace C in FIG. 5B). In many conditions, this surge has been observed to reach 600V in peak value, exceeding the ratings of the boost converter MOSFETs. Thus, one drawback of the technique in circuit 90 of FIG. 5A is that this circuit first allows a fault condition of higher inrush current to occur and then tries to prevent it, resulting in an undesirable voltage surge.
What is needed is a reliable and efficient circuit and corresponding method for providing the inrush current control demanded by current generation power supplies during hot and cold startup conditions and when power line disturbances occur.
The present invention solves the problems of prior art devices by providing a circuit and corresponding method which provides control to limit inrush current during cold startup, hot startup and power line disturbance conditions in AC to DC converters. The circuit of the present invention can be used for AC to DC converters with active power factor correction circuitry.
Broadly stated, the present invention provides an AC to DC power converter having active inrush current control during operational and power disturbance conditions, the converter having two input terminals to which AC power is coupled and two output terminals where the output DC power is provided, comprising an input rectifier for generating a rectified input voltage from a source of the AC power; a boost converter coupled to the rectifier for converting the input voltage to a DC voltage, the boost converter having a first switch, an inductor, and a first diode; an output capacitor connected to a first one of the DC output terminals; a resistor connected in series between the output capacitor and a second one of the DC output terminals; a second switch having a control input and being connected in parallel with the resistor; a control circuit for controlling inrush current, the control circuit being operatively connected to the control input of the second switch, comprising a comparator circuit for comparing the AC input and DC output voltages of the converter for causing the second switch to enter a conduction state when the AC input voltage exceeds a predetermined threshold and the AC input voltage is less than the DC output voltage.
The present invention broadly stated also provides a method of controlling inrush current in a AC-DC converter when AC power is lost during power line disturbance conditions, wherein the AC to DC converter is coupled between two input terminals to which AC power is coupled and two output terminals where the DC output voltage is provided, the AC-to DC converter including a boost converter controlled by a first switch, the AC to DC converter having connected across the output terminals a capacitor connected in series with the combination of a limiting resistor connected in parallel with a second switch, comprising the steps of maintaining a second switch in an off state to enable said limiting resistor to limit inrush current when said AC power is lost for a predetermined time interval; comparing the instantaneous AC input voltage to the DC output voltage of the converter; comparing the instantaneous AC input voltage to a predetermined voltage level to determine if the AC input voltage is present and non-zero; and triggering said second switch to the on state to shunt said limiting resistor when said AC power is restored to said predetermined level and the instantaneous input AC voltage is less than the DC voltage at the output of the AC-DC converter, such that inrush current is controlled and voltage surges at said DC output terminals are eliminated.
Consequently, the circuit and corresponding method of the present invention have the advantage that inrush current is controlled for hot startup and cold startup conditions, and even when power line disturbance conditions occur and provide the required control without undesirable voltage surges at the output.
Still another advantage of the present invention is that there is no need for an extra series dissipative device, and its consequent additional losses. For the present invention since the inrush current limiting resistor and the device which shunts it are placed in series with the bulk capacitor, the current stress is the same as for the bulk capacitor. This stress is much smaller than the input current. Thus, the dissipation is lower compared to placing the device in series with the input as in the known methods.